The basic DRAM memory cell currently being widely used includes a storage capacitor connected in series with a switch that is typically a field effect transistor (FET). A popular form of the transistor is a metal-oxide-silicon field effect transistor (MOSFET) that has a drain (an input/output), a source (an input/output), and a gate. As the capacity of a DRAM has grown, it has become necessary to use smaller and smaller components packed closer and closer. To maintain a good signal-to-noise ratio, it becomes important to keep the capacitance of the storage capacitor relatively high. A popular form of capacitor to achieve a high capacitance without using excessive chip surface area is the trench capacitor, which comprises a trench that extends vertically from the top surface of the silicon chip deep into the chip. This trench is first lined with a dielectric film to serve as the capacitor dielectric, and is then filled with doped polysilicon. The doped polysilicon serves as a plate and the storage node of the capacitor and as such, is connected to one input/output terminal (drain/source) of the MOSFET. The bulk of the silicon chip serves as the other plate of the capacitor and typically is connected to one terminal of a voltage supply source used with the DRAM. The other input/output terminal (source/drain) of the MOSFET is connected to a bit line of the DRAM. Logic information that is stored in the memory cell as charge on the storage capacitor is read into or out of a memory cell via the bit line. The gate of the MOSFET, which controls conduction through the MOSFET, is connected to a word line of the DRAM.
To increase the capacitance, the trend has been to extend the trench deeper and deeper into the silicon chip to increase the plate surface area of the capacitor and so the effective capacitance.
One of the problems that arises in the etching of a trench is deterioration of the mask that is deposited over the top surface of the chip to define the surface area to be etched. The rate of mask deterioration depends on the temperature of the wafer involved in the etching process and there is a limit to the amount of heating that can be safely withstood by the mask without excessive deterioration. This is sometimes described as the thermal budget of the mask.
One technique that has been proposed to increase the capacitance has been to flare the trench into a bottle shape once it breaks through the active upper region of the chip to increase the plate area without adding commensurately to the chip surface area occupied.
The present invention seeks to use the thermal budget more efficiently than has been done in the past so as to increase the capacitance that can be obtained from a trench capacitor.